Optimizing Processor Design with LLMs

Summary & Methodology Analysis

MicroEvo treats microarchitecture design as a search problem across a high-dimensional and discrete space. It uses a Monte Carlo Tree Search (MCTS), which is a heuristic search algorithm for decision-making, to manage design selection, expansion, and backpropagation. The search is guided by Pareto-UCT, a selection criterion that optimizes for both the quality of the Pareto front and the distribution diversity of the designs using hypervolume improvement and crowding distance metrics. This allows the system to balance exploration of new designs with exploitation of known high-performing configurations.

The framework integrates large language models to handle design generation. A Knowledge Tuner performs local refinement by leveraging historical insights, while a Pattern Explorer conducts high-level structural optimization based on relationships between sibling nodes in the search tree. To manage search progress, a State-Aware Directive dynamically switches the system between exploit, balance, and explore modes based on real-time data. The process is further bolstered by Active Knowledge Accumulation, which extracts and stores reusable optimization logic through parent-child pairwise analysis and Pareto analysis, ensuring the system learns from its search history.

Despite these advancements, the framework has notable limitations. Its effectiveness can diminish during later stages if the bias inherent in the language models' power, performance, and area predictions begins to compound. Furthermore, the knowledge extraction process is selective, triggering only when a design provides significant improvement. This design choice means that subtle but potentially useful insights may be overlooked, and the paper does not specify how these missed signals impact the long-term convergence of the search.